News Item Dated: 15 September 2002
From: SiliconValley.com (09/15/02); Takahashi, Dean

On Sunday, Intel will unveil the details of a new manufacturing process that will be used to mass produce chips with 90-nm-wide transistors by the second half of 2003, a breakthrough in chip size that ushers in the age of nanotechnology. The new manufacturing process should lead to speedier chips that will shrink the size of electronic devices such as cells phones and digital cameras and eventually lead to chips built at the atomic level.

Intel's Sunlin Chou says a 90-nm chip can theoretically contain 1 billion transistors, whereas the upcoming Madison chip, which uses transistors 130-nm wide, can hold nearly 500 million. The new process involves the integration of 90-nm technology with a silicon germanium hybrid that melds computing and communications operations. Intel's Tony Stelliga says this latter feature will eliminate much of the need to equip electronic devices with analog elements, thus saving space and money, while CTO Pat Gelsinger adds that the company will be able to build smart antennas.

Meanwhile, IBM, Advanced Micro Devices, and Texas Instruments claim they will compete with Intel for the 90-nm chip market, because they will transition to similar manufacturing processes at the same time. There will, however, be differences: Whereas Intel's process uses strained silicon technology that it says boosts processing speeds 20 percent, IBM's uses silicon-on-insulator (SOI) technology that's designed to reduce power requirements and thus allow more transistors on a single chip.

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