Hyun-Sung Kim
Kyungil University, Computer Engineering
Kyungsansi, Kyungpook Province, Korea
email: kim@kiu.ac.kr
Necessity : Finite field or Galois fields play an important role
in error-control coding, digital signal processing and cryptography.
Especially, the finite field is suitable for implementing
hardware architecture. Finite field arithmetic is fundamental
to the implementation of a number of modern cryptographic systems
and schemes of certain cryptographic systems. Most arithmetic
operations, such as exponentiation, inversion, and division
operations, can be carried out using just a modular multiplier
or using power-sum architecture. Therefore, to reduce the complexity
of these arithmetic architectures, an efficient architecture for
multiplication over is necessary.
Aim of the paper : Our first goal is to find a new algorithm for modular multiplications using generalized irreducible polynomial. General modular multiplication is analyzed in detail to derive a new algorithm. The algorithm is used to design arithmetic architectures with a low hardware and time complexity. Thus, a parallel-in parallel -out systolic array and a serial-in serial-out systolic array are designed based on the proposed algorithm. They both are based on a standard basis over finite fields. Proposed architectures could be used as a basic architecture for modular exponentiation, which is the basic operation in most of public key cryptosystems.
Advantages of our idea : Proposed architectures get a better area-time complexity compared to the previous architectures. They could reduce about 20% of area-time complexity. Additionally, they could be especially used in the application, which requires restricted hardware requirements like smart cards.